SPEED_CONTROL Project Status | |||
Project File: | Speed_Control.ise | Current State: | Programming File Generated |
Module Name: | Diagram |
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No Errors |
Target Device: | xc3s100e-4tq144 |
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1 Warning |
Product Version: | ISE 9.2.02i |
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on 10. okt 13:20:01 2007 |
SPEED_CONTROL Partition Summary | |||
No partition information was found. |
Device Utilization Summary | ||||
Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Flip Flops | 22 | 1,920 | 1% | |
Number of 4 input LUTs | 30 | 1,920 | 1% | |
Logic Distribution | ||||
Number of occupied Slices | 23 | 960 | 2% | |
Number of Slices containing only related logic | 23 | 23 | 100% | |
Number of Slices containing unrelated logic | 0 | 23 | 0% | |
Total Number of 4 input LUTs | 30 | 1,920 | 1% | |
Number of bonded IOBs | 10 | 108 | 9% | |
IOB Flip Flops | 3 | |||
Number of GCLKs | 1 | 24 | 4% | |
Total equivalent gate count for design | 383 | |||
Additional JTAG gate count for IOBs | 480 |
Performance Summary | |||
Final Timing Score: | 0 | Pinout Data: | Pinout Report |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report |
Timing Constraints: | All Constraints Met |
Detailed Reports | |||||
Report Name | Status | Generated | Errors | Warnings | Infos |
Synthesis Report | |||||
Translation Report | Current | ma 8. okt 10:53:32 2007 | 0 | 0 | 0 |
Map Report | Current | ma 8. okt 10:53:37 2007 | 0 | 1 Warning | 3 Infos |
Place and Route Report | Current | ma 8. okt 10:53:45 2007 | 0 | 0 | 2 Infos |
Static Timing Report | Current | ma 8. okt 10:53:48 2007 | 0 | 0 | 3 Infos |
Bitgen Report | Current | ma 8. okt 10:53:53 2007 | 0 | 0 | 0 |