VERSION 6 BEGIN SCHEMATIC BEGIN ATTR DeviceFamilyName "spartan3e" DELETE all:0 EDITNAME all:0 EDITTRAIT all:0 END ATTR BEGIN NETLIST SIGNAL XLXN_1 SIGNAL XLXN_2 SIGNAL XLXN_3 SIGNAL Ld(7:0) SIGNAL XLXN_8 SIGNAL XLXN_9 SIGNAL Clk_50MHz SIGNAL Btn0 SIGNAL Btn3 SIGNAL Sw(7:0) PORT Output Ld(7:0) PORT Input Clk_50MHz PORT Input Btn0 PORT Input Btn3 PORT Input Sw(7:0) BEGIN BLOCKDEF Deboounce TIMESTAMP 2009 3 2 21 46 20 RECTANGLE N 64 -128 320 0 LINE N 64 -96 0 -96 LINE N 64 -32 0 -32 LINE N 320 -96 384 -96 END BLOCKDEF BEGIN BLOCKDEF Master TIMESTAMP 2009 3 2 21 46 10 RECTANGLE N 64 -256 320 0 LINE N 64 -224 0 -224 LINE N 64 -160 0 -160 LINE N 64 -96 0 -96 RECTANGLE N 0 -44 64 -20 LINE N 64 -32 0 -32 LINE N 320 -224 384 -224 LINE N 320 -128 384 -128 LINE N 320 -32 384 -32 END BLOCKDEF BEGIN BLOCKDEF Slave TIMESTAMP 2009 3 2 21 46 15 RECTANGLE N 64 -192 320 0 LINE N 64 -160 0 -160 LINE N 64 -96 0 -96 LINE N 64 -32 0 -32 LINE N 320 -160 384 -160 RECTANGLE N 320 -44 384 -20 LINE N 320 -32 384 -32 END BLOCKDEF BEGIN BLOCK XLXI_1 Deboounce PIN Clk_50MHz Clk_50MHz PIN Btn_in Btn0 PIN Btn_out XLXN_9 END BLOCK BEGIN BLOCK XLXI_2 Master PIN Master_Clk XLXN_9 PIN Load Btn3 PIN MISO XLXN_8 PIN Datain(7:0) Sw(7:0) PIN SCLK XLXN_3 PIN MOSI XLXN_2 PIN SCS1 XLXN_1 END BLOCK BEGIN BLOCK XLXI_3 Slave PIN SCLK XLXN_3 PIN MOSI XLXN_2 PIN SS XLXN_1 PIN MISO XLXN_8 PIN Dataout(7:0) Ld(7:0) END BLOCK END NETLIST BEGIN SHEET 1 3520 2720 BEGIN INSTANCE XLXI_2 800 672 R0 END INSTANCE BEGIN BRANCH XLXN_1 WIRE 1184 640 1264 640 END BRANCH BEGIN INSTANCE XLXI_3 1264 672 R0 END INSTANCE BEGIN BRANCH XLXN_3 WIRE 1184 448 1200 448 WIRE 1200 448 1200 512 WIRE 1200 512 1264 512 END BRANCH BEGIN BRANCH XLXN_2 WIRE 1184 544 1200 544 WIRE 1200 544 1200 576 WIRE 1200 576 1264 576 END BRANCH BEGIN BRANCH Ld(7:0) WIRE 1648 640 1824 640 END BRANCH BEGIN BRANCH XLXN_8 WIRE 736 576 736 752 WIRE 736 752 1728 752 WIRE 736 576 800 576 WIRE 1648 512 1728 512 WIRE 1728 512 1728 752 END BRANCH BEGIN BRANCH XLXN_9 WIRE 736 336 784 336 WIRE 784 336 784 448 WIRE 784 448 800 448 END BRANCH BEGIN BRANCH Clk_50MHz WIRE 336 336 352 336 END BRANCH BEGIN BRANCH Btn0 WIRE 256 400 336 400 WIRE 336 400 352 400 END BRANCH BEGIN BRANCH Btn3 WIRE 576 512 784 512 WIRE 784 512 800 512 END BRANCH BEGIN BRANCH Sw(7:0) WIRE 624 640 800 640 END BRANCH IOMARKER 624 640 Sw(7:0) R180 28 IOMARKER 1824 640 Ld(7:0) R0 28 BEGIN INSTANCE XLXI_1 352 432 R0 END INSTANCE IOMARKER 336 336 Clk_50MHz R180 28 IOMARKER 256 400 Btn0 R180 28 IOMARKER 576 512 Btn3 R180 28 END SHEET END SCHEMATIC