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 Combinatorial Multipliers
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  •  Automatic generated code (Just press the VHDL Button)
 
 

 
 

 
Please note the relative low cost implementing a 4x4-bit multiplier in 100k spartan 3E FPGA (1% spend)

But what will a 18x18-bit multiplier cost.

 
 

 
The simple multiplier code will take use of a dedicated Multiplier (1 of 4).

Seems this code gave problems later (strange) - please check the alternative version below.
   
Please note the HUGE cost implementing a 18x18-bit multiplier in 100k spartan 3E FPGA (38% spend)

  •  Inside a FPGA - the multipliers
 

 
 

 
  For some reason seems it necessary to work 18-bit temp vectors for the input and a 36-bit output vector as well.
   
 
   
  Please note this version do have a problem when size=4