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TTL vs CMOS
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TTL CMOS PAL CPLD FPGA


The first digital systems was based on relays and valves (tubes) - the power disparaged and the cost was huge.

Next generation of logic, from the 1950ies, was based on the new Bipolar Junction Transistor. (RTL and TTL logic)

The invention of the integrated circuit (IC) started the next revolution in the world of digital design. Through the 1960ies was a family of digital components (the 74xx/54xx series) developed. The components became more complex (and expensive) until the invention of the first integrated CPU (i4004) started the next revolution.

A disadvantage by TTL is the power consumption - a BJT need a current in order to be turned ON.

The first MOS transistor was developed back in 1960, However was it first in the 1970ies this technology became popular for integrated circuit.

The introduction of CMOS technology in the 1980ies made it possible to develop very complex high-speed integrated circuits. The Power consumption follows the formula.

Power consumption of CMOS logic = Constant * Frequency * Voltage

  •  Constant which depends mostly on the physics of the chip (die) - The capacity of the gates - switch times, internal resistances etc.

  •  Frequency  which not the crystal frequency of the system (Bits of a binary counter doesn't change with the same frequency)

  •  Voltage a real "killer" and hence lots of effort made to reduce this (to say 1.5 Volts)

More historical facts can be found here

 
     

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