[Home] [#1 Introduction] [#2 Comb Logic] [#3 Latch - Flip/Flop] [#4 State Machines] [#5 Counters & Shiftregisters] [#6 Arithmetic] [#7 Complex Systems] [#8 VHDL simulation]
#3 Latch - Flip/Flop
Up ] #3.1 SR-Latch ] #3.2 D-Latch ] #3.3 D-F/F ] #3.4 D-F/F Ce Clr Res ] #3.5 Debouncher ] #3.6 T-F/F ]

Note! If your kit having problems with bouncing these exercises won't work right
#3.1
SR-Latches the basic elements off all "memory-elements", often used for debouching.
#3.2
D-Latches another useful sequential element which most often used in computer systems for the  purpose of de-multiplexing data and address-busses.
#3.3
D-Flip/Flop the most important "memory-element" used in all sequential logic (state-machines) *)
#3.4
D-Flip/Flops with Clock Enable, Asynchronous Clear or Synchronous Reset
#3.5
How to Debouche a Key, Switch or Button signal (Shift-register and SR-Latch)
#3.6
T-Flip/Flops with Clock Enable, Load, Clear and Toggle input
 

 

*) In the "stone-age" of digital design was the JK-Flip/Flop considered most important - but this not the case any more - read explanation in Wakerly 4ed