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Introduction to the ISE and
Digilent programs |
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#1.1 |
How to use the
Webpack making a
digital-design (Schematic) which test the BASYS kit switches and
LEDs |
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#1.2 |
The first example of a
VHDL
Module
which matches the #1.1 example.
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#1.3 |
You need a
MCS
file in
order to program then ROM at the BASYS board hence: How to make a
MCS file |
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#1.4 |
As a result of the synthesize process
can the
Boolean equations
be found as documentation. |
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The basics of Combinatorial
Logic |
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#2.1 |
Decoders
very useful in digital designs and this exercise present a 3-8
Decoder (1 out of 8 Decoder) |
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#2.2 |
Multiplexers
another useful component and this exercise present .... |
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#2.3 |
Example of a combinatorial design |
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#2.4 |
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Latches and Flip/Flops
- Note! If your kit having
problems with bouncing these exercises won't work right |
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#3.1 |
SR-Latches
the basic elements off all "memory-elements", often used for
debouching. |
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#3.2 |
D-Latches
another useful sequential element which most often used in computer
systems for the purpose of de-multiplexing data and
address-busses. |
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#3.3 |
D-Flip/Flop
the most important "memory-element" used in all sequential logic
(state-machines)
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#3.4 |
D-Flip/Flops
with Clock Enable, Asynchronous Clear or Synchronous Reset |
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#3.5 |
How to Debouche a Key, Switch or Button
signal (Shift-register
and SR-Latch) |
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#3.6 |
T-Flip/Flops
with Clock Enable, Load, Clear and Toggle input |
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State Machines |
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#4.1 |
State Machines the basic
elements in almost all kind of digital electronics - Asynchronous
vs. Synchronous and Mealy vs. Moore outputs. |
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#4.2 |
State Machine implementations
- 1,2 or 3 processes for a State Machine - Counter and Serial adder
ex. |
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#4.3 |
Levels of abstraction
- Inspired of the example Wakerly 7.4 |
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Counters and Shift
Registers |
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#5.1 |
Counters (bound to be updated) |
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#5.2 |
Multiple Clock
example (Actually only one clock) |
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#5.3 |
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#5.4 |
Shift register as a LIFO Stack |
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#5.5 |
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#5.6 |
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#5.7 |
PWM vs. Sigma Delta
- |
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#5.8 |
Example how to
implement a ADC with a FPGA (it properly better to use
an external ADC - but for the example) |
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Complex Systems |
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#7.1 |
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#7.2 |
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#7.3 |
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#7.4 |
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