| |
|
| #5.1 |
Counters |
| #5.2 |
How to handle
multiple clocks - |
| #5.3 |
Ringcounters
(yet to come) |
| #5.4 |
Lifo Stack |
| #5.5 |
Quadrature
encoder |
| #5.6 |
SPI and UARTs |
| #5.7 |
PWM vs.
Sigma-Delta |
|
#5.8 |
Example how to
implement a ADC with a FPGA (it properly better to use
an external ADC - but for the example) |
|
#5.9 |
Shift-registers example - Difference between Variables
and Signals |
|
#5.10 |
Rising and
Falling edge counter and Rising edge Reset
functionality. |
